a ADSP-2137x SHARC ® Processor Hardware Reference Includes ADSP-213 67, ADSP-21368, ADSP-21369, ADSP -21371, ADSP-21375 Revision 2.2, April 2013 Part Number 82-000100-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 Copyright Information © 2013 Analog Devices, Inc., ALL RIGHTS RESERVED. This docu- ment may not be reproduced in an y form without prior , express written consent from Analog Devices, Inc. Printed in the USA. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no re sponsibility is assumed by Analog Devices for its use; nor for any infrin gement of patents or other rights of third parties which may result from its us e. No license is granted by impli- cation or otherwise under the pate nt rights of Analog Devices, Inc. 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ADSP-2137x SHARC Processor Hardware Reference iii Contents PREFACE Purpose of This Manual ................................................................. xlv Intended Audience ......................................................................... xlv Manual Contents .......................................................................... xlvi What’s New in This Manual .......................................................... xlix Technical Support ......................................................................... xlix Supported Processors ......................................................................... l Product Information ......................................................................... l Analog Devices Web Site ............................................................ li EngineerZone ............................................................................. li Notation Conventions ..................................................................... lii Register Diagram Conve ntions ....................................................... liii INTRODUCTION Design Advantages ........................................................................ 1-1 SHARC Family Product Offerings ........................................... 1-2 Contents iv ADSP-2137x SHARC Processor Hardware Reference Processor Architectural Overview .................................................. 1-3 Processor Core ........................................................................ 1-3 I/O Peripherals ....................................................................... 1-3 I/O Processor ..................................................................... 1-3 Digital Audio Interf ace (DAI) ............................................. 1-4 Interrupt Controller ........................................................... 1-4 Signal Routing Unit ............................................................ 1-4 Digital Peripheral Interface (DPI) ....................................... 1-5 Interrupt Controller ........................................................... 1-5 Signal Routing Unit 2 ......................................................... 1-5 Development Tools ....................................................................... 1-6 Differences from Previous Processors ............................................. 1-7 I/O Architecture Enha ncements .............................................. 1-7 I/O PROCESSOR Features ........................................................................................ 2-2 Register Overview ......................................................................... 2-3 DMA Channel Regi sters ............................................................... 2-3 DMA Channel Allocation ....................................................... 2-3 Standard DMA Parameter Registers ......................................... 2-4 Extended DMA Parameter Registers ........................................ 2-7 Data Buffers ........................................................................... 2-8 Chain Pointer Registers ......................................................... 2-10 ADSP-2137x SHARC Processor Hardware Reference v Contents TCB Storage ............................................................................... 2-11 Serial Port TCB ..................................................................... 2-11 SPI TCB ............................................................................... 2-11 UART TCB .......................................................................... 2-12 External Port TCB ................................................................. 2-12 Clocking ..................................................................................... 2-17 Functional Description ............................................................... 2-17 Automated Data Transfer ....................................................... 2-17 DMA Transfer Types ............................................................. 2-18 DMA Direction ..................................................................... 2-19 Internal to External Memory ............................................. 2-19 Peripheral to Internal Memory .......................................... 2-20 Internal Memory to Internal Memory ................................ 2-20 DMA Controller Addressing .................................................. 2-20 Internal Index Register Addressing ..................................... 2-22 External Index Register Addressing .................................... 2-23 DMA Channel Stat us ............................................................ 2-23 DMA Start and Stop Conditions ............................................ 2-24 Operating Modes ........................................................................ 2-25 DMA Chaining ..................................................................... 2-27 TCB Memory Storage ....................................................... 2-27 Chain Assignment ............................................................. 2-28 Starting Chain Loading ..................................................... 2-30